The invention is in the field of power integrated circuit (PIC) devices, and relates specifically to techniques for providing reverse-voltage protection for such circuits.
As noted in "Reverse-Voltage Protection Methods for CMOS Circuits", IEEE Journal of Solid-State Circuits, Vol. 24, No. 1, February, 1989, it is known to introduce an n+ diffusion into a p-type well in order to create a p-n junction with the appropriate polarity to block excessive current when a reverse-polarity voltage is applied to an integrated circuit. However, it is noted in that publication that this approach has the disadvantage that the additional n diffusion forms the emitter of a parasitic vertical bipolar transistor, thus resulting in functional problems during normal operation. For this reason, this approach to the reverse-voltage protection problem was indicated to have been dropped. Various other prior-art reverse-voltage protection circuits, taking different approaches to the problem, are shown in U.S. Pat. No. 4,857,985 and European Patent Application No. 0360991.
Another approach to reverse-voltage protection, as discussed in the previously-cited IEEE publication, is to diffuse a region into the substrate to form the desired p-n blocking junction. However, this approach also introduces an undesirable parasitic transistor, and in any case this technique cannot be used in VDMOS power integrated circuits because the substrate in such circuits is typically tied to the maximum supply voltage.
Yet another known technique for providing reverse-voltage protection is to provide the blocking p-n junction as an external diode, but this approach is clearly undesirable as it requires an extra external component, with the attendant disadvantages of extra cost, space and complexity.
A final drawback of existing reverse-voltage protection circuits is that such circuits are not ideally adapted to high power, moderately high voltage operating conditions, such as those typically encountered in automotive operation, where the PIC must survive a reverse voltage of at least 12 volts and operate under forward voltage conditions as high as 35 volts.